Hello,
I just flashed my T420 (which I use since years) with a self-built coreboot ROM image last week. After the expreience I made for now can only recommend it!
Be aware that in my case
all I expected was a "clean" ROM being able to boot my Linux OS, and I got exactly this 
So nothing more (in fact, the SeaBios I currently use as coreboot payload does not come with a extensive "configuration menu" or something you might be used to from other bioses, but simply prints out a boot menu, if you press ESC).
Regarding the (dis-)assembly
My advice would be to follow exactly the steps illustrated in the Thinkpad Hardware Manual. I put the screws of each step in separate small plastic bags (the ones you can close). You can also print out the respective images where the steps are illustrated (should be < 10 pages) and tie the plastic bags to these pages. This would have been better for me, as at one step I first got the wrong plastic bag, but I found it out soon, comparing the length of the screws with the length mentioned in the manual.
Regarding the build
I selected the mainboard type T420 and selected "high resolution framebuffer" in the Display section. In this way the password screen for disk encryption on Ubuntu is shown correctly, also when an external monitor is connected (with legacy VGA, the screen might be shown only on one screen, while the other screen will not be usable for this boot).
I experimented with a boot bootsplash logo, but came to the conclusion to leave it up (proprietary VGA-bios blob required, otherwise logo is shown with artifacts). The bootsplash is displayed only for the delay you wait when the boot menu is shown. I minimized this delay to 200ms, so I would not have seen much of the image anyways.
You can disable the ME directly in the coreboot build. This worked for me. However, after positive experiments with that, I went on and used me_cleaner.py to reduce the size of the ME from 5MB to 84kB.
It will run the board Bring-Up (BUP) and then go to the "disabled" state, as usual with the Alt-ME Bit being set. The ME kernel is not running, because the part required to run is not there anymore

So the TCP stack and everything ME would need for network access is simply patched out completely.
btw: on the free space on the SPI chip, you could also store a small Linux kernel to boot your kernel, instead of using SeaBios. I did not try it for now, but I freed up the ~6 MB where it could stay.
So the following proprietary blobs remain:
- gbe.bin (gigabit network adaptor initialization)
If I did not forget a thing, all the rest should be built from open source components now.
Note: for SeaBios, I had to add a "bootorder" file to the ROM, as I use the mSata SSD option and otherwise I had to select the device at each boot.
Regarding the normal operation
As I mentioned, I use Linux. I did not see any noticeable difference/problems with coreboot. Some users mention that the power consumption would be higher / the board would heat up more quickly. I cannot confirm this for now. My fan is not hearable when browsing the web, etc. I use Suspend-to-Ram often when closing the lid (sometimes over months). Also this worked without problems for now.
Flashing
I used a RaspberryPi to flash the Chip with a Clamp connected to it. I read out the chip several times. For now, I only had to write to it
once externally.
All the next flashing trials can be done
internally with flashrom, when Linux is booted. In fact, I booted Linux from a USB Stick several times when the Mainboard laid on the table, with only the screen and the keyboard being connected to it. After I was satisfied with the coreboot rom, I reassembled the laptop and put my old disks back in again (mSata SSD + HDD), and the system worked just as before.
Note that if you have made a backup of your original ROM, you can always turn back to the state you had before.
Sou if you have decided to give coreboot a try and you have some questions, I would be glad to help you.